CDash : UNRES

1.06s
Test: UNRES_MIN_prota (Passed)
Build: Linux-pgi-MPI E0LL2Y (dell15) on 2023-04-20 04:15:21
Repository revision: cfd3f3ea9ccac7a6b9cb0e802b4c9e5927a506f6
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[dell15:54349] [[29950,0],0] ORTE_ERROR_LOG: Data unpack would read past end of buffer in file ../../orte/util/show_help.c at line 507
[dell15:54349] [[29950,0],0] ORTE_ERROR_LOG: Data unpack would read past end of buffer in file ../../orte/util/show_help.c at line 507
 Processor            0  out of            2  rank in CG_COMM            0 
  size of CG_COMM            1  size of FG_COMM            2  rank in FG_COMM1 
            0  size of FG_COMM1            2
Inside initialize Processor            1  out of            2  rank in FG_COMM            1 
  size of FG_COMM            2  rank in FG_COMM1            1  size of FG_COMM1
             2
Inside initialize thetname_pdb 
 /tmp/cdash/source/PARAM/thetaml.5parm                                                                                                                                                                                                                           
           51  opened
 thetname_pdb 
 /tmp/cdash/source/PARAM/thetaml.5parm                                                                                                                                                                                                                           
           51  opened
 MPI: node=             0  iseed=                  -3059742
 indpdb=           25  pdbref=  T
 Call Read_Bridge.
 ns=            0
 Processor            0            0            0  ivec_start            1 
  ivec_end           23
 ns=            0
 Processor            1            1            1  ivec_start           24 
  ivec_end           47
 after etotal
 Calling MINIM_DC
 check_ecart before sumsl
 Processor            1  CG group            0  absolute rank            1 
  leves ERGASTULUM.
 Processor            1  wait times for respective orders order[            0 ]
    1.4611163642257452E-003  order[            1 ]   2.2456515813246369E-002 
  order[            2 ]    0.000000000000000       order[            3 ] 
    0.000000000000000       order[            4 ]    0.000000000000000      
  order[            5 ]    0.000000000000000       order[            6 ] 
    0.000000000000000       order[            7 ]   0.1214832412078977      
  order[            8 ]    0.000000000000000       order[            9 ] 
    0.000000000000000       order[           10 ]    0.000000000000000     
 check_ecart
 SUMSL return code is            4  eval           667
 # eval/s    1132.607197386577     
 refstr=  T
 Total wall clock time   0.6403323160484433       sec
 Processor            0  BROADCAST time   6.0231194365769625E-003  REDUCE time 
   6.7454189993441105E-003  GATHER time    0.000000000000000       SCATTER time
     0.000000000000000       SENDRECV    0.000000000000000       BARRIER ene 
   6.5409063827246428E-003  BARRIER grad   2.2299804259091616E-003
CG processor   0 is finishing work.
Warning: ieee_invalid is signaling
Warning: ieee_divide_by_zero is signaling
Warning: ieee_inexact is signaling
Bye Bye...
Warning: ieee_invalid is signaling
Warning: ieee_divide_by_zero is signaling
Warning: ieee_inexact is signaling
Bye Bye...
SUMSL return code 4
SUMSL return code 4
OK: absdiff= .003400, ene= -154.958800
OK: absdiff= .003400, ene= -154.958800